CNTs are sheets of carbon just one atom thick that have been rolled up into a tube with a diameter of about 1 nm. Semiconducting nanotubes can be used to build transistors, for example, and could even replace silicon CMOS technology at sub-10 nm scales in a host of future nanoelectronics devices. This is because they are tiny, but can still carry huge amounts of current. The tubes also boast high switching speeds and high on-off current ratios.

There is a problem, however, in that the operation speed of CNT ICs falls short of their theoretical potential and is less than that of silicon CMOS circuits (which operate at gigahertz frequencies) by several orders of magnitude. CNT-thin-film-based ICs, for example, typically have a working frequency of less than 1 MHz, which although useful for flexible electronics is not suitable for mainstream high-performance CMOS technology.

A team of researchers led by Lian-Mao Peng has now made the first CNT-based ICs that do operate in the GHz regime. “In particular, the gate delay for CNT random film-based FETs that we made with a gate length of 115 nm is just 18 ps, which is very close to that of Si MOS FETs (11 ps) with a similar gate length (130 nm),” says Peng. “This shows that CNTs have great potential in the post-Moore era.”

These figures will undoubtedly be further improved upon, he tells, since all the FETs studied in this work are based on randomly-oriented CNT films with multiple chiralities. These could almost certainly be replaced with better quality films containing aligned single-chirality CNTs, for example, with lower defect density.

The researchers began by making high-performance random CNT-film-based FETs with a channel length of 200 nm. These devices have a transconductance of 0.38 mS/μm and an on-state current density of 0.41 mA/μm, values that are at least three times higher than that of previously reported FETs made with a similar type of CNT film. They then made ring oscillators from these FETs.

“These devices have a maximum oscillation frequency of 680 MHz, which is 13 times that of ring oscillators based on single CNTs (reported on in 2006) and nearly 2.5 times higher than that of the fastest ring oscillators based on self-assembled CNTs reported on last year,” says Peng.

Optimizing the device structure

The team then optimized the structure of the oscillators to reduce parasitic capacitances and resistances. “We in fact introduced air gaps between the source/drain and gate electrodes in the devices to decrease gate resistance,” explains Peng. “This pushed the oscillation frequency from 680 MHz to 2.52 GHz for a gate length of around 200 nm We eventually ended up increasing the frequency to 5.54 GHz by scaling down the FET gate length to 115 nm

“Our work proves that we can build CNT ICs that are almost as good as those based on silicon technology using currently available CNT material systems – that is, those made out of randomly-oriented CNT films,” he says. “Since CNTs can be built on flexible and glass substrates, this means that high-performance flexible and transparent electronics with a much higher performance than that of existing technology (such as that based on organic materials) will soon become a reality.”

How small can the devices go?

The ring oscillator, for its part, might be used to make interface circuits for wireless sensor systems, he adds. “For this application, a parameter known as the frequency sensitivity (which is defined as the voltage-dependent variation of oscillation frequency) is important. This sensitivity is used to characterize how good the interface circuit is in terms of performance and our CNT oscillator has a very high frequency sensitivity of around 1.14 GHz/V, which is roughly eight times higher than that of graphene ring oscillators.”

The researchers say that they will now continue building CNT CMOS FETs based on individual nanotubes to find out how small they can scale down these devices and to measure their performance at extremely small gate lengths (that is, less than 10 nm). They have already obtained some promising results from such studies. “The second step is to build high-speed ICs in batch using high-performance FETs based on random CNT films, as we have done in this work,” reveals Peng. “We will also be combining CMOS technology and solution-based CNTs with well-aligned arrays with tube-to-tube spacings of 5–8 nm. This goal will be extremely challenging, but if we succeed, it could help us make cheaper, faster and lower power CNT chips as compared to Si CMOS technology.”